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Safran

Safran High Accuracy Timing IP Core (HATI)

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The HATI (High Accuracy Timing IP) is a FPGA core intended to enable sub-nanosecond synchronization accuracy once it is integrated onto a third-party hardware that it is connected to Safran’s WR-Z device by using optical fiber links. The IP core is able to achieve this performance thanks to the use of White Rabbit protocol (based on IEEE-1588, Sync-E and precise clock compensation).

The only requirement is that the network device holds a FPGA directly connected to the port which will receive the synchronization from the network, since the HATI core needs to introduce and recover certain traffic flow which will be used in the synchronization process.

The HATI allows the distribution of the time and frequency with a sub nanosecond accuracy and picosecond level precision through standard fiber optic for distances up to 80 km in point-to-point links. It provides deterministic delivery of timing information (time and frequency) for time-critical applications by using ethernet over fiber optic links.

The HATI solution enables WR capability on end nodes, achieving ultra-accurate synchronization performance in an easy deployment, with optimal resources utilization.

The latest version has been adapted to work on the following list of FPGA families: Kintex7, Kintex7-US, Kintex-7US+, Virtex7 & Virtex7-US+, Zynq 7 & Zynq US+, Artix-US+. You can contact us to check for other platforms.

The HATI can be acquired in two different ways:  as a FPGA IP core to be integrated in customer hardware through an integration project, or as an integrated feature on our third-party partners’ network devices which will be connected to a WR-Z device under license.

KEY ADVANTAGES

Sub-nanosecond accuracy at last hop

Connecting to the optical interfaces of a WR-Z device, the developed technology allows to correct the internal clock offset after receiving periodical data exchanges from the master WR-Z device.

Highly accurate and deterministic timing solution integration on third-party network devices

Thanks to the HATI solution, it is possible to synchronize FPGA-based third-party network devices with high accuracy without the need of using expensive oscillators/clocks or other dedicated hardware. The use of WR over optical fiber up to the end nodes allow to improve the scalability and simplify the deployment and maintenance of the timing network.

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Details

The HATI (High Accuracy Timing IP) is a FPGA core intended to enable sub-nanosecond synchronization accuracy once it is integrated onto a third-party hardware that it is connected to Safran’s WR-Z device by using optical fiber links. The IP core is able to achieve this performance thanks to the use of White Rabbit protocol (based on IEEE-1588, Sync-E and precise clock compensation).

The only requirement is that the network device holds a FPGA directly connected to the port which will receive the synchronization from the network, since the HATI core needs to introduce and recover certain traffic flow which will be used in the synchronization process.

The HATI allows the distribution of the time and frequency with a sub nanosecond accuracy and picosecond level precision through standard fiber optic for distances up to 80 km in point-to-point links. It provides deterministic delivery of timing information (time and frequency) for time-critical applications by using ethernet over fiber optic links.

The HATI solution enables WR capability on end nodes, achieving ultra-accurate synchronization performance in an easy deployment, with optimal resources utilization.

The latest version has been adapted to work on the following list of FPGA families: Kintex7, Kintex7-US, Kintex-7US+, Virtex7 & Virtex7-US+, Zynq 7 & Zynq US+, Artix-US+. You can contact us to check for other platforms.

The HATI can be acquired in two different ways:  as a FPGA IP core to be integrated in customer hardware through an integration project, or as an integrated feature on our third-party partners’ network devices which will be connected to a WR-Z device under license.

KEY ADVANTAGES

Sub-nanosecond accuracy at last hop

Connecting to the optical interfaces of a WR-Z device, the developed technology allows to correct the internal clock offset after receiving periodical data exchanges from the master WR-Z device.

Highly accurate and deterministic timing solution integration on third-party network devices

Thanks to the HATI solution, it is possible to synchronize FPGA-based third-party network devices with high accuracy without the need of using expensive oscillators/clocks or other dedicated hardware. The use of WR over optical fiber up to the end nodes allow to improve the scalability and simplify the deployment and maintenance of the timing network.

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